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Chengyi Lux Zhang

UCIe Sideband

A Chisel Implementation, and Chipyard Integration utilities

Chengyi Lux Zhang, Yun-Chieh Lee

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Project Overview

UCIe is an open, multi-protocol capable, on-package interconnect standard for connecting multiple dies on the same package. The primary motivation is to enable a vibrant ecosystem supporting disaggregated die architectures which can be interconnected using UCIe. We designed and implemented a chisel implementation of the sideband component of the UCIe standard. We also created multiple utilities to integrate the UCIe sideband component into the chipyard framework. This implementation is thoroughly verified in chiseltest.